Skip to content
GitLab
Projects
Groups
Snippets
/
Help
Help
Support
Community forum
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
Menu
Open sidebar
Remy Foray
VVCSoftware_VTM
Commits
93e2a774
Commit
93e2a774
authored
Jul 20, 2019
by
Adarsh Krishnan Ramasubramonian
Browse files
JVET-O0106: 4xN prediction regions for 1xN/2xN subblocks of ISP
parent
5804363c
Changes
6
Hide whitespace changes
Inline
Side-by-side
source/Lib/CommonLib/CommonDef.h
View file @
93e2a774
...
...
@@ -213,6 +213,10 @@ static const int MAX_REF_LINE_IDX = 3; //highest
static
const
int
MRL_NUM_REF_LINES
=
3
;
//number of candidates in the array
static
const
int
MULTI_REF_LINE_IDX
[
4
]
=
{
0
,
1
,
3
,
0
};
#if JVET_O0106_ISP_4xN_PREDREG_FOR_1xN_2xN
static
const
int
PRED_REG_MIN_WIDTH
=
4
;
// Minimum prediction region width for ISP subblocks
#endif
static
const
int
NUM_LUMA_MODE
=
67
;
///< Planar + DC + 65 directional mode (4*16 + 1)
static
const
int
NUM_LMC_MODE
=
1
+
2
;
///< LMC + MDLM_T + MDLM_L
static
const
int
NUM_INTRA_MODE
=
(
NUM_LUMA_MODE
+
NUM_LMC_MODE
);
...
...
source/Lib/CommonLib/TypeDef.h
View file @
93e2a774
...
...
@@ -50,6 +50,8 @@
#include
<assert.h>
#include
<cassert>
#define JVET_O0106_ISP_4xN_PREDREG_FOR_1xN_2xN 0 // JVET-O0106: use 4xN prediction regions for 1xN and 2xN subblocks
#define JVET_O0315_RDPCM_INTRAMODE_ALIGN 1 // JVET-O0200/O0205/O0296/O0342/O0463/O0542: Intra prediction mode alignment for BDPCM
#define JVET_O0284_CONDITION_SMVD_MVDL1ZEROFLAG 1 // JVET-O0284: condition sym_mvd_flag on mvd_l1_zero_flag
...
...
source/Lib/CommonLib/UnitTools.cpp
View file @
93e2a774
...
...
@@ -4318,6 +4318,28 @@ bool CU::isSameSbtSize( const uint8_t sbtInfo1, const uint8_t sbtInfo2 )
return
false
;
}
#if JVET_O0106_ISP_4xN_PREDREG_FOR_1xN_2xN
bool
CU
::
isPredRegDiffFromTB
(
const
CodingUnit
&
cu
,
const
ComponentID
compID
)
{
return
(
compID
==
COMPONENT_Y
)
&&
(
cu
.
ispMode
==
VER_INTRA_SUBPARTITIONS
&&
CU
::
isMinWidthPredEnabledForBlkSize
(
cu
.
blocks
[
compID
].
width
,
cu
.
blocks
[
compID
].
height
)
);
}
bool
CU
::
isMinWidthPredEnabledForBlkSize
(
const
int
w
,
const
int
h
)
{
return
((
w
==
8
&&
h
>
4
)
||
w
==
4
);
}
bool
CU
::
isFirstTBInPredReg
(
const
CodingUnit
&
cu
,
const
ComponentID
compID
,
const
CompArea
&
area
)
{
return
(
compID
==
COMPONENT_Y
)
&&
cu
.
ispMode
&&
((
area
.
topLeft
().
x
-
cu
.
Y
().
topLeft
().
x
)
%
PRED_REG_MIN_WIDTH
==
0
);
}
void
CU
::
adjustPredArea
(
CompArea
&
area
)
{
area
.
width
=
std
::
max
<
int
>
(
PRED_REG_MIN_WIDTH
,
area
.
width
);
}
#endif
bool
CU
::
isGBiIdxCoded
(
const
CodingUnit
&
cu
)
{
if
(
cu
.
cs
->
sps
->
getUseGBi
()
==
false
)
...
...
source/Lib/CommonLib/UnitTools.h
View file @
93e2a774
...
...
@@ -80,7 +80,12 @@ namespace CU
bool
hasNonTsCodedBlock
(
const
CodingUnit
&
cu
);
uint32_t
getNumNonZeroCoeffNonTs
(
const
CodingUnit
&
cu
,
const
bool
lumaFlag
=
true
,
const
bool
chromaFlag
=
true
);
uint32_t
getNumNonZeroCoeffNonTsCorner8x8
(
const
CodingUnit
&
cu
,
const
bool
lumaFlag
=
true
,
const
bool
chromaFlag
=
true
);
#if JVET_O0106_ISP_4xN_PREDREG_FOR_1xN_2xN
bool
isPredRegDiffFromTB
(
const
CodingUnit
&
cu
,
const
ComponentID
compID
);
bool
isFirstTBInPredReg
(
const
CodingUnit
&
cu
,
const
ComponentID
compID
,
const
CompArea
&
area
);
bool
isMinWidthPredEnabledForBlkSize
(
const
int
w
,
const
int
h
);
void
adjustPredArea
(
CompArea
&
area
);
#endif
bool
isGBiIdxCoded
(
const
CodingUnit
&
cu
);
uint8_t
getValidGbiIdx
(
const
CodingUnit
&
cu
);
void
setGbiIdx
(
CodingUnit
&
cu
,
uint8_t
uh
);
...
...
source/Lib/DecoderLib/DecCu.cpp
View file @
93e2a774
...
...
@@ -186,6 +186,20 @@ void DecCu::xIntraRecBlk( TransformUnit& tu, const ComponentID compID )
const
uint32_t
uiChFinalMode
=
PU
::
getFinalIntraMode
(
pu
,
chType
);
//===== init availability pattern =====
#if JVET_O0106_ISP_4xN_PREDREG_FOR_1xN_2xN
bool
predRegDiffFromTB
=
CU
::
isPredRegDiffFromTB
(
*
tu
.
cu
,
compID
);
bool
firstTBInPredReg
=
CU
::
isFirstTBInPredReg
(
*
tu
.
cu
,
compID
,
area
);
CompArea
areaPredReg
(
COMPONENT_Y
,
tu
.
chromaFormat
,
area
);
if
(
predRegDiffFromTB
)
{
if
(
firstTBInPredReg
)
{
CU
::
adjustPredArea
(
areaPredReg
);
m_pcIntraPred
->
initIntraPatternChType
(
*
tu
.
cu
,
areaPredReg
);
}
}
else
#endif
m_pcIntraPred
->
initIntraPatternChType
(
*
tu
.
cu
,
area
);
//===== get prediction signal =====
...
...
@@ -204,7 +218,18 @@ void DecCu::xIntraRecBlk( TransformUnit& tu, const ComponentID compID )
}
else
{
m_pcIntraPred
->
predIntraAng
(
compID
,
piPred
,
pu
);
#if JVET_O0106_ISP_4xN_PREDREG_FOR_1xN_2xN
if
(
predRegDiffFromTB
)
{
if
(
firstTBInPredReg
)
{
PelBuf
piPredReg
=
cs
.
getPredBuf
(
areaPredReg
);
m_pcIntraPred
->
predIntraAng
(
compID
,
piPredReg
,
pu
);
}
}
else
#endif
m_pcIntraPred
->
predIntraAng
(
compID
,
piPred
,
pu
);
}
}
const
Slice
&
slice
=
*
cs
.
slice
;
...
...
source/Lib/EncoderLib/IntraSearch.cpp
View file @
93e2a774
...
...
@@ -1841,7 +1841,21 @@ void IntraSearch::xIntraCodingTUBlock(TransformUnit &tu, const ComponentID &comp
PelBuf
sharedPredTS
(
m_pSharedPredTransformSkip
[
compID
],
area
);
if
(
default0Save1Load2
!=
2
)
{
initIntraPatternChType
(
*
tu
.
cu
,
area
);
#if JVET_O0106_ISP_4xN_PREDREG_FOR_1xN_2xN
bool
predRegDiffFromTB
=
CU
::
isPredRegDiffFromTB
(
*
tu
.
cu
,
compID
);
bool
firstTBInPredReg
=
CU
::
isFirstTBInPredReg
(
*
tu
.
cu
,
compID
,
area
);
CompArea
areaPredReg
(
COMPONENT_Y
,
tu
.
chromaFormat
,
area
);
if
(
predRegDiffFromTB
)
{
if
(
firstTBInPredReg
)
{
CU
::
adjustPredArea
(
areaPredReg
);
initIntraPatternChType
(
*
tu
.
cu
,
areaPredReg
);
}
}
else
#endif
initIntraPatternChType
(
*
tu
.
cu
,
area
);
//===== get prediction signal =====
if
(
compID
!=
COMPONENT_Y
&&
PU
::
isLMCMode
(
uiChFinalMode
)
)
...
...
@@ -1859,7 +1873,18 @@ void IntraSearch::xIntraCodingTUBlock(TransformUnit &tu, const ComponentID &comp
}
else
{
predIntraAng
(
compID
,
piPred
,
pu
);
#if JVET_O0106_ISP_4xN_PREDREG_FOR_1xN_2xN
if
(
predRegDiffFromTB
)
{
if
(
firstTBInPredReg
)
{
PelBuf
piPredReg
=
cs
.
getPredBuf
(
areaPredReg
);
predIntraAng
(
compID
,
piPredReg
,
pu
);
}
}
else
#endif
predIntraAng
(
compID
,
piPred
,
pu
);
}
}
...
...
Write
Preview
Supports
Markdown
0%
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment