Speed-Up for ISP when JVET_M0464_UNI_MTS is enabled. It can be enabled/disabled with the config. file parameter ISPFast.

When enabled,
-it merges all full RD intra mode lists into one,
-it tests fewer non-DCT-II transforms if ISP is likely to become the best mode and
-it stops testing intra modes for an ISP split if all sub-partitions obtained a zero-cbf.

Results in CTC:

AI -> 0.04% loss, EncT = 97%, DecT = 100%
RA -> 0.01% loss, EncT = 99%, DecT = 100%

There is a conflict with JVET_M0427_INLOOP_RESHAPER that is triggering a debug assertion that checks that the width is not 1.

    to w×h >= 64 luma samples

    See merge request !34

Squashed commit of the following:

commit fb98d9c6
Author: Shelly Chiang <chiangshelly@yahoo.com.tw>
Date:   Wed Oct 31 08:18:02 2018 +0800

    fix the variables for L0100 as suggested

commit 552f201a
Author: Shelly Chiang <chiangshelly@yahoo.com.tw>
Date:   Wed Oct 31 00:52:58 2018 +0800

    fix the interaction

commit 3f0f36f4
Author: Shelly Chiang <chiangshelly@yahoo.com.tw>
Date:   Tue Oct 30 12:17:43 2018 +0800

    fix distroy buffer size for L0100

commit 649dd1d2
Merge: 859c574b 5c46b9be
Author: Shelly Chiang <chiangshelly@yahoo.com.tw>
Date:   Tue Oct 30 10:19:56 2018 +0800

    update the codebase

commit 859c574b
Author: Shelly Chiang <chiangshelly@yahoo.com.tw>
Date:   Tue Oct 30 10:14:03 2018 +0800

    update the codebase

commit 694008b4
Merge: 0ac16832 e9bf7ed5
Author: Shelly Chiang <chiangshelly@yahoo.com.tw>
Date:   Mon Oct 29 12:57:36 2018 +0800

    update the codebase

commit 0ac16832
Author: Shelly Chiang <chiangshelly@yahoo.com.tw>
Date:   Mon Oct 29 11:23:51 2018 +0800

    modify MHIntra as suggested

commit a375e85c
Author: Shelly Chiang <chiangshelly@yahoo.com.tw>
Date:   Thu Oct 25 11:48:44 2018 +0800

    merge MHIntra into VTM