Skip to content
Snippets Groups Projects

Fix mem band cache enable in dmvr

Fix memory bandwidth of DMVR again. Cache is enabled incorrectly in DMVR process. Checking srcPadStride enables cache because srcPadStride is always 0 other than DMVR process

Merge request reports

Loading
Loading

Activity

Filter activity
  • Approvals
  • Assignees & reviewers
  • Comments (from bots)
  • Comments (from users)
  • Commits & branches
  • Edits
  • Labels
  • Lock status
  • Mentions
  • Merge request status
  • Tracking
Please register or sign in to reply
Loading